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Secondary sampling point Shift registers length\end_layout
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Width (number of bits) in transceiver delay measurement counter\end_layout
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Width of SSP generator counters (BTMC, SSPC)\end_layout
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\begin_inset Text

\begin_layout Plain Layout
606
in\end_layout
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\end_inset
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610
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
614
std_logic\end_layout
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\end_inset
</cell>
618
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
622
Asynchronous reset\end_layout
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\end_inset
</cell>
</row>
<row>
628
<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
632
Physical layer interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
643
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
647
Physical layer interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
658
<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
662
Physical layer interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

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</cell>
673
<cell alignment="center" leftline="true" multicolumn="2" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
677
Physical layer interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

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</cell>
</row>
<row>
690
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
694
can_rx\end_layout
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\end_inset
</cell>
698
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
702
in\end_layout
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\end_inset
</cell>
706
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
710
std_logic\end_layout
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\end_inset
</cell>
714
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
718
CAN serial stream output\end_layout
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\end_inset
</cell>
</row>
<row>
724
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
728
can_tx\end_layout
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\end_inset
</cell>
732
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
736
out\end_layout
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\end_inset
</cell>
740
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
744
std_logic\end_layout
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\end_inset
</cell>
748
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
752
CAN serial stream input\end_layout
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\end_inset
</cell>
</row>
<row>
758
<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
762
Memory registers interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
777
Memory registers interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
792
Memory registers interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
803
<cell alignment="center" leftline="true" multicolumn="2" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
807
Memory registers interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
</row>
<row>
820
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
824
drv_bus\end_layout
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\end_inset
</cell>
828
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
832
in\end_layout
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\end_inset
</cell>
836
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
std_logic_vector 
\begin_inset Newline newline
\end_inset

844
(1023 downto 0)\end_layout
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\end_inset
</cell>
848
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
852
Driving bus\end_layout
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\end_inset
</cell>
</row>
<row>
858
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
862
trv_delay\end_layout
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\end_inset
</cell>
866
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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out\end_layout
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\end_inset
</cell>
874
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
std_logic_vector 
\begin_inset Newline newline
\end_inset

882
(G_TRV_CTR_WIDTH - 1 downto 0)\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
890
Measured Transceiver delay\end_layout
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\end_inset
</cell>
</row>
<row>
896
<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
900
Prescaler interface\begin_inset ERT
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status open
\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
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Prescaler interface\begin_inset ERT
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\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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Prescaler interface\begin_inset ERT
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\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" multicolumn="2" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
945
Prescaler interface\begin_inset ERT
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\begin_layout Plain Layout
\backslash
cellcolor{gray}
\end_layout
\end_inset
\end_layout

\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
962
rx_trigger\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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in\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
978
std_logic\end_layout
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\end_inset
</cell>
982
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
986
RX Trigger\end_layout
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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_layout Plain Layout
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tx_trigger\end_layout
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</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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in\end_layout
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</cell>
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\begin_inset Text

\begin_layout Plain Layout
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std_logic\end_layout
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\end_inset
</cell>
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\begin_inset Text

\begin_layout Plain Layout
1020
TX Trigger\end_layout
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\end_inset
</cell>
</row>
<row>
1026
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1030
sync_edge\end_layout
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\end_inset
</cell>
1034
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1038
out\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1046
std_logic\end_layout
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\end_inset
</cell>
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<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1054
Valid synchronisation edge appeared (Recessive to Dominant)\end_layout
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\end_inset
</cell>
</row>
<row>
<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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tq_edge\end_layout

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<cell alignment="center" leftline="true" topline="true" usebox="none" valignment="top">
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in\end_layout

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std_logic\end_layout

\end_inset
</cell>
<cell alignment="center" leftline="true" rightline="true" topline="true" usebox="none" valignment="top">
\begin_inset Text

\begin_layout Plain Layout
Time quanta edge\end_layout

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\end_inset
</cell>
</row>
<row>
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<cell alignment="center" leftline="true" multicolumn="1" rightline="true" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
1098
CAN Core Interface\begin_inset ERT
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status open
\begin_layout Plain Layout
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\end_layout
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\end_layout
\end_inset
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\end_layout

\end_inset
</cell>
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<cell alignment="center" leftline="true" multicolumn="2" topline="true" usebox="none" valignment="top">
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\begin_inset Text

\begin_layout Plain Layout
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CAN Core Interface\begin_inset ERT
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\end_layout
\end_inset
\end_layout
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